Moderators: Bill Bottoms, Ravi Mahajan
Facilitators: Gamal Refai-Ahmed, Amr Helmy, Bill Chen, Madhusudan Iyengar, Weihua Tang. Abhijit Dasgupta
Note: The HI Roadmap can be found here.
The Workshop will be held on Thursday October 29th (9:10 AM –12:20 PM PST). The Workshop topics are tailored to the InterPACK audience and include a focus on Photonics, Thermals, Interconnects and Reliability. The workshop has a panel format and we are excited to welcome a highly distinguished panel in this workshop.
Panel Format
- Each panelist gets 5 mins to make an opening statement on their strategic vision for Heterogeneous Integration
- Moderators will then open up the panel for questions and an open debate
- Attendees are encouraged to send questions by email to Bill Bottoms (bill_bottoms@3mts.com) or Ravi Mahajan (ravi.v.mahajan@intel.com) beforehand.
- Questions will also be solicited live in the chat window
- End panel with a closing statement by Bill Bottoms and Bill Chen on HIR status/plans
Panelists:
John Shalf is Department Head for Computer Science Lawrence Berkeley National Laboratory, and recently was deputy director of Hardware Technology for the DOE Exascale Computing Project. Shalf is a coauthor of over 80 publications in the field of parallel computing software and HPC technology, including three best papers and the widely cited report "The Landscape of Parallel Computing Research: A View from Berkeley" (with David Patterson and others). He also coauthored the 2008 "ExaScale Software Study: Software Challenges in Extreme Scale Systems," which set the Defense Advanced Research Project Agency’s (DARPA’s) information technology research investment strategy. Prior to coming to Berkeley Laboratory, John worked at the National Center for Supercomputing Applications and the Max Planck Institute for Gravitation Physics/Albert Einstein Institute (AEI) where he was co-creator of the Cactus Computational Toolkit.
Dr. Antai Xu has been the Senior Director of Reliability Engineering at Xilinx Corporation since 2015. He has led all new product qualifications of 16nm and 7nm technologies, overcoming many challenges in 2.5D & 3D Si integration. Prior to joining Xilinx, he served as the Division Head of Backend Quality and Reliability in TSMC, where he led the reliability testing and qualifications of the two breakthrough technologies, CoWOS & InFO. Both technologies were successfully delivered to production with phenomenal impact to the semiconductor product development in the final stage of Moore's Law. Dr. Xu’s broader experiences also include 28 years of R&D, Materials Processing, Reliability as well as Executive Management in the industry of Aerospace Electronics, HDD Storage, O/MEMS, and Bio/DNA testing systems. Dr Xu received his PHD from Purdue University in Materials Science, and MS from Georgetown University in Physics.
Dr. Ali Heydari is Data Center Technologist at Nvidia in charge of all data center technology development at Nvidia. In this role, he is developing direct to chip liquid cooling technologies using cold plates, cooling distribution units and manifolds for cooling of Nvidia's high heat density. Prior to Nvidia, he worked as Senior director in charge of Rigetti’s Quantum Computers using the most futuristic technology in today’s data center compute. Accomplishments include, setting up the first Quantum Cloud Services enabling over the cloud access of the Quantum Computers. Prior to that he served as Senior Technical Director and Chief Data Center Architect at Baidu, the largest search engine and AI company in China. In this role, he was server and data center architect in charge of hardware and data center design, development and deployment in China's largest data center search and AI company. He was responsible for development of cutting-edge data center and server hardware technology such as IDEC and free air-cooled data center design, high power density server rack design, liquid cooling of CPU/GPU servers and liquid cooled heat exchanger rack and data center solutions for achieving extremely low data center PUE/WUR at Baidu’s data centers in China. Formerly, he was Senior Hardware engineer at Twitter where he was responsible for grounds up development of Twitter’s data center ODM server development. Earlier, he was Senior Hardware Engineer at Facebook where he helped in developing Facebook's original OCP server and data center products. Prior to that he worked at Sun Microsystems and spent about 10 years as Associate Professor of Mechanical Engineering at Sharif University of Technology in Iran. He received his BS in Mechanical Engineering from University of Illinois, Urbana, MS, PhD in Mechanical Engineering and MA in Applied Mathematics from University of California, Berkeley. He has over 25 issued patents in data center cooling technologies.
Professor John Bowers is Director of the Institute for Energy Efficiency and a Distinguished Professor in the Departments of Electrical and Computer Engineering and Materials at the University of California, Santa Barbara. His research interests are primarily concerned with silicon photonics, optoelectronic devices, optical switching and transparent optical networks and quantum dot lasers. Bowers received the M.S. and Ph.D. degrees from Stanford University and then worked for AT&T Bell Laboratories before joining UCSB. Bowers is a fellow of the IEEE, OSA and the American Physical Society, and a recipient of the IEEE Photonics Award, OSA/IEEE Tyndall Award, the IEEE LEOS William Streifer Award and the South Coast Business and Technology Entrepreneur of the Year Award. He is a member of the National Academy of Engineering and the National Academy of Inventors.